Interleaving of data is a feature of turbo codes commonly used in wireless communications standards. To perform the interleaving in hardware, interleaver tables are kept in memory or are generated on-the-fly. Storing all of the tables in the memory is often unsuitable because of size restrictions. A conventional interleaver computer interleaves the data according to the interleaver tables. The interleaver computer has a microsequencer that generates control signals to control execution of the interleaving operations.
The microsequencer should be optimized for an intended wireless communications standard. A conventional approach to optimize the microsequencer is to build a sequence program into the hardware of the microsequencer. In such a case, the microsequencer generates hardcoded commands, one by one, depending only on an input vector length. However, the hardcoding means that only a single standard is supported. A multi-standard interleaver thus incorporates multiple microsequencers, a different microsequencer for each wireless standard. Furthermore, a hardcoded microsequencer cannot be applied to a new wireless standard with a different interleaving sequence.
Another criterion for the microsequencer is a small delay between consecutively generated commands. For each interleave pattern, the sets of different commands are finite and relatively small. Thus, the command sets can be stored in a memory of the microsequencer. As such, the microsequencer fetches the commands from the memory in some particular order and directs the commands to other circuitry. The sequence of fetched commands can be nonlinear. The sequence can be described by a C-like program language, for example:
proc main {fetch command1 *5;fetch command2 *R1;call func1 *R0 ;fetch command5 *1;}proc func1 {fetch command1 *R0;fetch command4 *1;fetch command3 *R2;}Here “fetch <command>” means that the microsequencer fetches the <command> from the memory and “call” means a call of a subprocedure. Each call operation and fetch operation is executed X times as specified by the “*X”. A value of X can be a value stored in a register at run time.
Existing subprocedure calls introduce a delay in fetching the next instruction from memory because the microsequencer uses time to process the resulting branch operation. Returning from subprocedures uses more time because the returns can be to different points in the program, depending on the real count of already executed instances of the subprocedures. As such, conventional implementations of the microsequencer have delays in all programs with subprocedure calls. Increasing the number of subprocedures results in increased delays.